1. Field of the Invention
The present invention relates to the field of data processing and more particularly to the field of coherent multi-processing systems in which two or more processor cores share access to a coherent memory region.
2. Description of the Prior Art
In the field of data processing, integrated circuits are known that comprise several processor cores. These processor cores are either coherent multi-processing mode processor cores that have access to a coherent memory region shared with other processor cores, or they are non-coherent processing mode processor cores. A coherent memory region is one that will always provide the latest value written to a particular address to a read operation to that address, and that ensures that any write values are correctly written to the memory.
Coherent multi-processing cores can have individual and private copies of the memory at a particular time, in order to increase efficiency. However, in order to ensure that the memory accessed remains coherent at all times i.e. that any memory access to a particular address will always find the latest value, coherency managing operations need to be performed within these systems. It is known to provide coherent multi-processing systems in which two or more processor cores share access to a coherent memory region. Such systems are typically used to gain higher performance, the different processor cores executing respective data processing operations in parallel. Known data processing systems which provide such coherent multi-processing capabilities include IBM370 systems and SPARC multi-processing systems.
An important aspect of such coherent multi-processing systems is the need to co-ordinate the activity of the different processor cores and in particular manage the manner in which they keep the memory which they share in a coherent state. As an example, if one of the processor cores has read a data value from memory and is currently updating that data value prior to writing it back to memory, then an intervening action by another processor core seeking to read that same data value from the coherent shared memory needs to be provided with the updated data value even though this has not yet been written back to the main memory and is only present in one of the other processor cores. This type of situation requires coherency management and is one example of the type of coherent multi-processing management operations which need to be provided in such systems.
Thus, there are both advantages and drawbacks to coherent multi-processing processor cores and it depends on the functions to be performed whether it is more efficient to use coherent multi-processing processor cores or non-coherent processing cores. A processor core operating in non-coherent mode never requires coherency managing operations to be performed in response to any memory access that it makes.